Generation of Technology-Independent Retargetable Analog Blocks

This paper introduces a complete methodology for retargeting of analog cells to different sets of specifications. This methodology is technology-independent, thus allowing the migration, from one technology to another, of the circuit under retargeting. Careful integration of the device sizing and layout generation tasks via the incorporation of layout constraints during the sizing process allows to generate fully functional designs in a few minutes. The methodology is illustrated via the retargeting of a fully-differential Miller-compensated two-stage operational amplifier for a new set of specifications and two different technological processes.An erratum to this article can be found at     

基于IP核复用技术的SoC设计

概述了国内外IP产业的发展情况,论述了我国发展IP核复用技术SoC设计的可能性和必要性,指出我国急需发展的关键芯片及IP核种类.     

基于充放电原理实现的微电容测量电路

具有抗分布电容以及简单实用等特性的充放电电路是目前微电容测量中广泛采用的一种测量电路。本文对基于充放电原理的微电容测量电路进行了深入研究，并介绍一种基于充放电原理的实用电路。     

长距离管线监测系统的一种智能化过流防护方法

介绍了长距离管线监测系统的一种智能化过流防护方法，详细说明其电路设计原理及相关元件的选择，并与串联自复过流保护元件方式相比较，分析其整体性能，说明其具有响应速度快，安全可靠等特点。     

Chaos Synchronization between the Coupled Modified Chua's Circuits with Nonlinear Quadratic Function x|x|

1　ＩｎｔｒｏｄｕｃｔｉｏｎＴｏｄａｙ ,ｍｕｃｈａｔｔｅｎｔｉｏｎｈａｓｂｅｅｎｐａｉｄｔｏｃｈａｏｓｓｙｎｃｈｒｏｎｉｚａｔｉｏｎ[1 ,2 ] .Ｃｈａｏｓｓｙｎｃｈｒｏｎｉｚａｔｉｏｎｃａｎｍａｉｎｌｙｂｅｃｌａｓｓｉｆｉｅｄｉｎｔｏｔｗｏｔｙｐｅｓｃａｌｌｅｄｍｕｔｕａｌｓｙｎｃｈｒｏｎｉｚａｔｉｏｎａｎｄｍａｓｔｅｒ ｓｌａｖｅｓｙｎｃｈｒｏｎｉｚａｔｉｏｎａｃ ｃｏｒｄｉｎｇｔｏｔｈｅｃｏｕｐｌｉｎｇｃｏｎｆｉｇｕｒａｔｉｏｎ[3,8] .Ｔｈｅｆｏｒ ｍｅｒｉｓｗｉｔｈｂｉ ｄｉｒｅｃｔｉｏｎａｌｃｏ…     

大功率晶体管的保护电路

大功率晶体管调速系统中作为开关元件使用时，共优点是开关频率比可控硅的高，但是不注意保护就容易损坏。着重研究过电流故障，并对保护作用的影响进行了分析，进而提出了防止过电流的方法和工作原理。     

基于混沌电路的一种混合噪声调制雷达引信

提出了一种基于混沌电路的随机脉位调制（RPPM）和随机二相码调相（RBCPM）混合调制的雷达引信系统。介绍了该引信波形的数学模型，平均模型函数及引信的实现框图和工作原理，研究了基于混沌电路的混合调制信号的产生方法，这种引信波形不仅具有结构简单和易于处理等特点，而且具有良好的测距和测速性能，以及极低的截获概率和很强的抗干扰特性。     

VLSI Implementation of Forward Error Control Technique for ATM Networks

In asynchronous transfer mode (ATM) networks, fixed length cells of 53 bytes are transmitted. A cell may be discarded during transmission due to buffer overflow or a detection of errors. Cell discarding seriously degrades transmission quality. The quality degradation can be reduced by employing efficient forward error control (FEC) to recover discarded cells. In this paper, we present the design and implementation of decoding equipment for FEC in ATM networks based on a single parity check (SPC) product code using very‐large‐scale integration (VLSI) technology. FEC allows the destination to reconstruct missing data cells by using redundant parity cells that the source adds to each block of data cells. The functionality of the design has been tested using the Model Sim 5.7cXE Simulation Package. The design has been implemented for a 5 ° 5 matrix of data cells in a Virtex‐E XCV 3200E FG1156 device. The simulation and synthesis results show that the decoding function can be completed in 81 clock cycles with an optimum clock of 56.8 MHz. A test bench was written to study the performance of the decoder, and the results are presented.     

一种平面魔T结构的研究

为在小体积范围内产生雷达和信号、差信号，介绍了一种宽带平面型魔T结构的实现方法。通过选取合适的电路结构，并借助微波EM分析软件，在微带线和槽线的基板上实现了平面型魔T结构电路功能，在较宽的频带内实现了良好的幅相特性，并给出了测试结果。同时表明作为一种传输线结构二槽线，有其独特的优点和应用价值。     

时钟电路的电磁兼容性设计

对时钟电路设计中的3个主要问题：阻抗、传输延迟以及容性负载分别进行了阐述、分析与计算，得出了能够改善时钟电路电磁兼容性（EMC）的设计方法，并通过实践得以证实。